Power amplifier circuits are widely used in the field of wireless communications. Many wireless communication systems use power amplifier circuits to amplify the signal before it is transmitted, so that the power or the amplitude of the signal may be amplified to a desired value.
Referring to FIG. 1, there is shown a circuit diagram of a conventional power amplifier circuit. As shown in figure, the power amplifier circuit 100 comprises a power amplifier unit 11, a power detection unit 13, and a bias control unit 15.
The input terminal of the power amplifier 11 is connected to an input signal fin via a first capacitor 121. The power detection unit 13 comprises an N-type transistor 131, the gate terminal of which is connected to the input signal fin via a second capacitor 122. The first capacitor 121 and the second capacitor 122 are used for eliminating the DC voltage component of the input signal fin, such that the power amplifier 11 and the power detection unit 13 will only receive the AC voltage component of the input signal fin. The bias control unit 15 comprises a current mirror that consists of two P-type transistors 151, 152, a diode connected N-type transistor 153, and an inductor 154.
The power detection unit 13 receives the input signal fin via the gate terminal of the transistor 131, and generates a half-wave current signal on the drain terminal of the transistor 131 by detecting the power of the input signal fin. Then, current mirror consisted of two P-type transistors 151, 152 couples the half-wave current signal to the N-type transistor 153. The inductor 154 generates a bias 111 to the input terminal of the power amplifier circuit 11 according to the half-wave current signal. When the power of the input signal fin is larger, the bias 111 will be pulled up, consequently resulting the power amplifier circuit 11 may be flow more current IOUT and increase the gain. On the contrary, when the power of the input signal fin is smaller, the bias 111 will be pulled down, consequently resulting the power amplifier circuit 11 may be flow less current IOUT and decrease the gain. Therefore, the gain of the power amplifier circuit 100 may be adjusted dynamically by detecting the power magnitude of the differential input signal fin.
Referring to FIG. 2, there is shown a circuit diagram of another conventional power amplifier circuit. As shown in figure, the power amplifier circuit 200 comprises a power amplifier unit 21 and a peak detection feedback unit 23.
The power amplifier unit 21 comprises a load resistor 211 and two transistors 213, 215. The load resistor 211 is connected between the voltage source VDD and the output terminal 203 of the power amplifier circuit 200. Two transistors 213, 215 are coupled in a cascade configuration, where the gate terminal of the transistor 215 is connected to the input terminal 201 of the power amplifier circuit 200 to receive an input signal (in). Two transistors 213, 215 are used to amplify the input signal to generate an output signal (out) at the drain terminal of transistor 213.
The peak detection feedback unit 23 comprises a first peak detector 231, a second peak detector 233, an attenuator 235, and a differential amplifier 237. The input signal is transmitted to the first peak detector 231, and then the first peak detector 231 is for detecting the power of the input signal to generate a first detection signal. The first detection signal will be transmitted to the positive terminal of differential amplifier 237. The output signal is transmitted to attenuator 235 that attenuates the output signal by a factor proportional. For example, the power amplifier unit 21 has a gain of A, and then the attenuator 235 attenuates the gain of the output signal to 1/A. The attenuated output signal is transmitted to the second peak detector 233, and then the second peak detector 233 for detecting the power of the attenuated output signal to generate a second detection signal that is transmitted to the negative of the differential amplifier 237.
The differential amplifier 237 compares the different between the first detection signal and the second detection signal to output a bias 210. The bias 210 is transmitted to the gate terminal of the transistor 215 to adjust the gain of the power amplifier unit 21.
If the power of the input signal is greater than the power of the attenuated output signal, it indicates that the gain of the power amplifier unit 21 is less than the required gain, which result would allow the differential amplifier 237 to generate a higher bias 210 that is transmitted to the gate of transistor 215. Whereby the controlling of the higher bias 210, more current flows through the power amplifier unit 21 and the gain of the power amplifier unit 21 is increased.
Oppositely, if the power of the input signal is less than the power of the attenuated output signal, it indicates that the gain of the power amplifier unit 21 is greater than the required gain, which result would allow the differential amplifier 237 to generate a lower bias 210 that is transmitted to the gate of transistor 215. Whereby the controlling of the lower bias 210, less current flows through the power amplifier unit 21 and the gain of the power amplifier unit 21 is reduced.
Accordingly, different from the traditional power amplifier circuit 100, 200, the present invention provides an innovative architecture for power amplifier circuit that not only may adjust the gain dynamically and but also can maintain the linearity of gain better, it will be the objects to be achieved by the present invention desirably.